Duty cycle control for low-power-listening MAC protocols.

Christophe J. Merlin Wendi B. Heinzelman

Published in: MASS (2008)

Keyphrases

low power
duty cycle
low cost
power consumption
high speed
real time
single chip
vlsi architecture
low power consumption
vlsi circuits
cmos technology
logic circuits
digital signal processing
gate array
ultra low power
power dissipation