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constant-slew-rate high-bandwidth low-voltage rail-to-rail CMOS input stage for VLSI cell libraries.
Juan M. Carrillo
J. Francisco Duque-Carrillo
Guido Torelli
José L. Ausín
Published in:
ISCAS (1) (2003)
Keyphrases
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low voltage
high speed
high bandwidth
low latency
end to end
cmos technology
low power
design considerations
high density
application specific
power management
real time
database systems
signal processing
power consumption
power dissipation