Login / Signup
Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs.
Ognjen Glamocanin
Shashwat Shrivastava
Jinwei Yao
Nour Ardo
Mathias Payer
Mirjana Stojilovic
Published in:
J. Hardw. Syst. Secur. (2023)
Keyphrases
</>
multimedia
real time
data sets
levels of abstraction
image processing
hardware implementation
evaluation model