Low-power multiplier with static decision for input manipulation.
Mohammad RiazatiAshkan SobhaniM. Mottaghi-DastjerdiAli Afzali-KushaAli Khaki-FiroozPublished in: ISCAS (2006)
Keyphrases
- low power
- low cost
- high speed
- power consumption
- high power
- digital signal processing
- wireless transmission
- vlsi circuits
- single chip
- low power consumption
- vlsi architecture
- logic circuits
- mixed signal
- cmos technology
- gate array
- vlsi implementation
- power reduction
- delay insensitive
- processing capabilities
- energy dissipation
- floating point