, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET.
Fei GaoTing-Jung ChangAng LiMarcelo Orenes-VeraDavide GiriPaul J. JacksonAugust NingGeorgios TziantzioulisJoseph ZuckermanJinzheng TuKaifeng XuGrigory ChirkovGabriele TombesiJonathan BalkindMargaret MartonosiLuca P. CarloniDavid WentzlaffPublished in: CICC (2023)
Keyphrases
- virtual memory
- processor core
- magnetic tape
- low power
- garbage collection
- single chip
- graphics processing units
- read write
- application specific
- low power consumption
- main memory
- query processing
- low cost
- data storage
- cache conscious
- data access
- operating system
- memory subsystem
- real time
- silicon on insulator
- replacement policy
- prefetching
- data management
- memory access
- cmos technology
- hash table
- secondary storage
- field programmable gate array
- random access
- data transfer
- embedded systems
- high speed