A CMOS 5.4/3.24Gbps dual-rate clock and data recovery design for DisplayPort v1.2.
Jae-Wook YooTae-Ho KimDong-Kyun KimJin-Ku KangPublished in: SoCC (2010)
Keyphrases
- data sets
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- image data
- case study
- high quality
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- high speed
- raw data
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- small number
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- prior knowledge
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- training data
- power consumption
- databases