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FPGA Realization of Low Register Systolic All-One-Polynomial Multipliers Over $GF(2^{m})$ and Their Applications in Trinomial Multipliers.

Pingxiuqi ChenShaik Nazeem BashaMehran Mozaffari KermaniReza AzarderakhshJiafeng Xie
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2017)
Keyphrases
  • systolic array
  • real time
  • lagrangian relaxation
  • neural network
  • hardware implementation
  • genetic algorithm
  • computer vision
  • high speed
  • decision variables