A hardware accelerator IP for EBCOT Tier-1 coding in JPEG2000 Standard.
Tien-Wei HsiehYoun-Long LinPublished in: ESTIMedia (2004)
Keyphrases
- block coding
- field programmable gate array
- coding scheme
- low cost
- coding method
- hardware and software
- real time
- compression ratio
- parallel implementation
- inter frame
- hardware architecture
- error resilience
- bit plane
- embedded systems
- bitstream
- hardware implementation
- image coding
- video transmission
- application layer
- computer systems
- signal processing
- multiresolution