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Novel gate-overlap tunnel FET based innovative ultra-low-power ternary flash ADC.
Sanjay Vidhyadharan
Surya Shankar Dan
Abhay S. Vidhyadharan
Ramakant Yadav
Simhadri Hariprasad
Published in:
Integr. (2020)
Keyphrases
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ultra low power
low power
field effect transistors
high speed
cmos technology
single chip
simulation model
steady state
power consumption
mathematical analysis
foreseeable future
real time
low cost
video sequences
data structure
disk drives
case study
genetic algorithm