Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing.
Carlo SauFrancesca PalumboMaxime PelcatJulien HeulotErwan NoguesDaniel MénardPaolo MeloniLuigi RaffoPublished in: IEEE Embed. Syst. Lett. (2017)
Keyphrases
- field programmable gate array
- hardware implementation
- low cost
- systolic array
- digital signal
- real time
- high speed
- reconfigurable hardware
- efficient computation
- low complexity
- real world
- reconfigurable architecture
- hardware design
- hardware architecture
- real time image processing
- video compression
- image pixels
- embedded systems
- signal processing