High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs.
Burhan KhurshidRoohie Naaz MirPublished in: Int. J. Reconfigurable Comput. (2015)
Keyphrases
- high efficiency
- high accuracy
- real and synthetic datasets
- hardware implementation
- memory space
- parallel architectures
- parallel processing
- result quality
- arbitrary shape
- parallel implementation
- field programmable gate array
- parallel computation
- information systems
- computer architecture
- learning algorithm
- general purpose
- scheduling problem