A low-power high-speed accuracy-controllable approximate multiplier design.
Tongxin YangTomoaki UkezonoToshinori SatoPublished in: ASP-DAC (2018)
Keyphrases
- low power
- high speed
- single chip
- low power consumption
- power consumption
- low cost
- vlsi architecture
- logic circuits
- digital signal processing
- cmos technology
- gate array
- power reduction
- power dissipation
- high power
- mixed signal
- wireless transmission
- ultra low power
- real time
- design methodology
- design process
- wireless communication
- vlsi circuits