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Low power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels.
Khurram Muhammad
Robert Bogdan Staszewski
Poras T. Balsara
Published in:
ISLPED (2000)
Keyphrases
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low power
high speed
single chip
low cost
power consumption
digital signal processing
low power consumption
logic circuits
vlsi architecture
gate array
cmos technology
adaptive filtering
power reduction
ultra low power
power dissipation
high power
mixed signal
vlsi circuits
design process