Optimizing FPGA-Based DNN Accelerator With Shared Exponential Floating-Point Format.
Wenzhe ZhaoQiwei DangTian XiaJingming ZhangNanning ZhengPengju RenPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2023)
Keyphrases
- floating point
- field programmable gate array
- fixed point
- square root
- instruction set
- metadata
- parallel implementation
- application specific
- training process
- hardware implementation
- hardware design
- interval arithmetic
- data management
- sparse matrices
- information systems
- embedded systems
- multi view
- fast fourier transform
- image segmentation
- floating point arithmetic