A 4.75-GHz Fractional Frequency Divider-by-1.25 With TDC-Based All-Digital Spur Calibration in 45-nm CMOS.
Stefano PelleranoPaolo MadoglioYorgos PalaskasPublished in: IEEE J. Solid State Circuits (2009)
Keyphrases
- power consumption
- clock gating
- metal oxide semiconductor
- high speed
- circuit design
- low power
- cmos technology
- low cost
- mixed signal
- camera calibration
- low frequency
- silicon on insulator
- clock frequency
- dielectric constant
- cmos image sensor
- nm technology
- phase locked loop
- image sequences
- high frequency
- frequency band
- eye tracking
- parallel processing
- image sensor
- charge coupled device
- analog to digital converter
- camera parameters