Efficient Hardware Architecture for EBCOT in JPEG 2000 Using a Feedback Loop from the Rate Controller to the Bit-Plane Coder.
Grzegorz PastuszakPublished in: ICIAP (2005)
Keyphrases
- bit plane
- feedback loop
- low complexity
- hardware architecture
- image coding
- rate distortion
- transform domain
- wavelet coefficients
- bit planes
- probability model
- coding method
- bitstream
- bit rate
- wavelet domain
- image coder
- distributed video coding
- rate control
- subband
- spatial domain
- dct domain
- coding scheme
- entropy coding
- video compression
- multiresolution
- block coding
- image coding algorithm
- steady state
- feature extraction