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DLX HOTOKADA: A design and implementation of a 32-bit dual core capable DLX microprocessor with single level cache.

Darryl Aldrin M. DioquinoKatrina Joy S. RosarioHomer F. SupeJestoni V. ZarsuelaAnastacia P. BallesilJoy Alinda Reyes
Published in: ICECS (2008)
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