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FinCANON: A PVT-Aware Integrated Delay and Power Modeling Framework for FinFET-Based Caches and On-Chip Networks.
Chun-Yi Lee
Niraj K. Jha
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2014)
Keyphrases
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modeling framework
power dissipation
power consumption
high bandwidth
ibm power processor
high speed
high density
chip design
multithreading
topic modeling
feature selection
case study
educational technology
databases
active learning
power management