Latch-Based Performance Optimization for Field-Programmable Gate Arrays.
Bill TengJason Helge AndersonPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2013)
Keyphrases
- field programmable gate array
- programmable logic
- embedded systems
- hardware implementation
- low power
- parallel computing
- fpga technology
- parallel architectures
- signal processing
- host computer
- computing systems
- massively parallel
- high end
- digital signal processing
- hardware software co design
- neural network
- hardware software
- hardware architecture
- query optimization
- data processing
- artificial intelligence