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Efficient C level hardware design for floating point biomedical DSP applications.
Harry Sidiropoulos
Efthymia Kazakou
Christoforos E. Economakos
George Economakos
Published in:
BIBE (2013)
Keyphrases
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floating point
hardware design
sparse matrices
fixed point
hardware implementation
square root
signal processing
parallel architectures
real time
machine learning
artificial intelligence