Low-Complexity High-Speed Decoder Design for Quasi-Cyclic LDPC Codes.

Zhongfeng Wang Zhiqiang Cui

Published in: IEEE Trans. Very Large Scale Integr. Syst. (2007)

Keyphrases

low complexity
low density parity check
high speed
distributed video coding
ldpc codes
vlsi architecture
motion estimation
wyner ziv
computational complexity
rate allocation
error correction
video streaming
computer simulation
low power
bit plane