A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology.
Nick ZhangYoung Suk KimPeter HsuSamsoo KimDerek TaoHung-Jen LiaoPing-Wei WangGeoffrey YeapQuincy LiTsung-Yung Jonathan ChangPublished in: VLSI Technology and Circuits (2023)