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System-Level Power Estimation with On-Chip Bus Performance Monitoring Units in PKU-DSPII SoC.
Xiaoyu Ni
Teng Wang
Yueming Zhao
Xindong Su
Xin'an Wang
Published in:
CIT (2012)
Keyphrases
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high speed
low power
real time
monitoring system
ultra low power
neural network
ibm power processor
power consumption
hardware and software
accurate estimation
chip design
decision support
high density
power dissipation
low cost
higher level
estimation accuracy
physical design
programmable logic
control system