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Synchronous Controller Models for Synthesis from Communicating VHDL Processes.

Naren NarasimhanRanga VemuriJay Roy
Published in: VLSI Design (1996)
Keyphrases
  • real time
  • neural network
  • genetic algorithm
  • probabilistic model
  • statistical models
  • social networks
  • control algorithm
  • communication channels
  • controller synthesis
  • model selection
  • process model
  • closed loop