A multi-mode 1-V DAC+filter in 65-nm CMOS for reconfigurable (GSM, TD-SCDMA and WCDMA) transmitters.
Li LiJun MaYawei GuoXu ChengXiaoyang ZengPublished in: ASICON (2011)
Keyphrases
- low cost
- power consumption
- power reduction
- metal oxide semiconductor
- silicon on insulator
- low power
- high speed
- nm technology
- cmos technology
- reinforcement learning
- analog vlsi
- temporal difference
- learning algorithm
- reinforcement learning algorithms
- mobile communication
- noise reduction
- td learning
- max csp
- circuit design
- single chip
- remote control
- hardware and software
- delay insensitive
- embedded systems
- cmos image sensor
- reconfigurable architecture
- end to end