Unrolled Polar Decoders, Part I: Hardware Architectures.
Pascal GiardGabi SarkisClaude ThibeaultWarren J. GrossPublished in: CoRR (2015)
Keyphrases
- hardware architectures
- computational power
- hardware architecture
- table of contents
- rotation invariant
- fourier transform
- zernike moments
- polar coordinates
- frequency domain
- fourier analysis
- power reduction
- decoding algorithm
- data management
- data processing
- parallel processing
- artificial intelligence
- information systems