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BIST-Based Low Power Test Vector Generator and Minimizing Bulkiness of VLSI Architecture.

J. PraveenM. N. Shanmukha Swamy
Published in: J. Circuits Syst. Comput. (2018)
Keyphrases
  • low power
  • vlsi architecture
  • low cost
  • high speed
  • power consumption
  • low complexity
  • vlsi implementation
  • built in self test
  • real time
  • cmos technology
  • logic circuits
  • computer vision
  • signal to noise ratio
  • mixed signal