A 1.2 V 500 MHz 32-bit carry-lookahead adder.

Kuo-Hsing Cheng Wen-Shiuan Lee Yung-Chong Huang

Published in: ICECS (2001)

Keyphrases

bit parallel
high speed
pattern matching
nm technology
flip flops
high frequency
data flow
low power
power dissipation
bit vectors
databases
data structure
real time
hash table
logic circuits
fpga device
case study
knowledge base