Boosting the performance of embedded vision systems using a DSP/FPGA co-processor system.
Franz RinnerthalerWilfried KubingerJosef LangerMartin HumenbergerStefan BorbelyPublished in: SMC (2007)
Keyphrases
- vision system
- systolic array
- digital signal
- high speed
- verilog hdl
- real time image processing
- parallel architecture
- signal processing
- digital signal processing
- embedded systems
- computer vision systems
- single chip
- data flow
- field programmable gate array
- real time
- stereo vision
- computer vision
- hardware implementation
- stereo camera
- gate array
- visual servoing
- scene understanding
- image processing
- world model
- low cost
- xilinx virtex
- visual environment
- machine vision systems
- visual attention
- parallel processing
- fpga device
- active stereo
- general purpose processors
- biological vision systems
- low power
- high frequency
- object detection
- cognitive vision