Characterizing Individual Gate Power Sensitivity in Low Power Design.

Unni Narayanan Georgios I. Stamoulis Rabindra K. Roy

Published in: VLSI Design (1999)

Keyphrases

low power
power consumption
cmos technology
power dissipation
single chip
nm technology
low power consumption
high power
low cost
vlsi architecture
high speed
power reduction
logic circuits
digital signal processing
ultra low power
gate array
energy efficiency
power saving
vlsi circuits
power management
design process