Circuit architecture for low-power race-free programmable logic arrays.
Giby SamsonLawrence T. ClarkPublished in: ACM Great Lakes Symposium on VLSI (2006)
Keyphrases
- low power
- programmable logic
- cmos technology
- high speed
- vlsi architecture
- power consumption
- low cost
- logic circuits
- nm technology
- mixed signal
- vlsi circuits
- power reduction
- power dissipation
- gate array
- single chip
- low voltage
- hardware description language
- high power
- delay insensitive
- real time
- image sensor
- low power consumption
- wireless transmission
- digital signal processing
- focal plane
- signal processor
- design considerations
- field programmable gate array
- hardware implementation
- embedded systems
- vlsi implementation