A Scalable and Efficient In-Memory Interconnect Architecture for Automata Processing.
Elaheh SadrediniReza RahimiVaibhav VermaMircea StanKevin SkadronPublished in: IEEE Comput. Archit. Lett. (2019)
Keyphrases
- limited memory
- real time
- memory management
- processing elements
- computational power
- high speed
- management system
- memory usage
- computation intensive
- low latency
- random access
- highly scalable
- highly efficient
- lightweight
- data processing
- data flow
- processing units
- software architecture
- information processing
- multithreading
- digital signal processors