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The Instruction Set Architecture of the Inference Processor UNIRED II.
Kentaro Shimada
Hanpei Koike
Hidehiko Tanaka
Published in:
Architectures and Compilation Techniques for Fine and Medium Grain Parallelism (1993)
Keyphrases
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instruction set
instruction set architecture
computer architecture
bayesian networks
parallel processing
application specific
sufficient conditions
object oriented
data management
floating point