Optimizing throughput for limited receiver circuit power.

Johan H. C. van den Heuvel Jean-Paul M. G. Linnartz Peter G. M. Baltus

Published in: ISCAS (2010)

Keyphrases

power consumption
high speed
battery life
single phase
response time
power dissipation
chip design
duty cycle
circuit design
energy dissipation
power allocation
channel state information
congestion control
cmos technology
allocation scheme
dc dc converter