Crosstalk aware coupled line delay tree construction for on-chip interconnects.
Tuhina SamantaSanoara KhatunHafizur RahamanParthasarathi DasguptaPublished in: ISQED (2011)
Keyphrases
- tree construction
- power dissipation
- power consumption
- low power
- decision trees
- cmos technology
- line segments
- low cost
- digital signal processing
- suffix tree
- high speed
- r tree
- design methodology
- high density
- machine learning
- phase locked loop
- finite state machines
- input output
- multi dimensional
- feature extraction
- search engine