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A 4.2pJ/Pixel 480 fps Stereo Vision Processor with Pixel Level Pipelined Architecture and Two-Path Aggregation Semi-Global Matching.
Zehao Li
Yuncheng Lu
Anh Tuan Do
Tony Tae-Hyoung Kim
Published in:
CICC (2024)
Keyphrases
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pixel level
stereo vision
semi global matching
stereo matching
real time
image fusion
superpixels
stereo images
vision system
frame rate
depth estimation
disparity map
scan line
hardware implementation
input image
driver assistance systems
multi view
preprocessing
field programmable gate array
multiscale