Login / Signup
High Performance Graphics on a SIMD Linear Processor Array.
Laurent Letellier
Didier Juvin
Jean-Luc Basille
Jean Rebillat
Published in:
ISCAS (1993)
Keyphrases
</>
processor array
parallel computers
array processor
mesh connected
parallel algorithm
parallel implementation
distributed memory
massively parallel
scan line
semantic network
image segmentation
data access