A 2 × 20-Gb/s, 1.2-pJ/bit, time-interleaved optical receiver in 40-nm CMOS.
Shih-Hao HuangZheng-Hao HongWei-Zen ChenPublished in: A-SSCC (2014)
Keyphrases
- nm technology
- high speed
- random access memory
- cmos technology
- power consumption
- focal plane
- silicon on insulator
- low power
- metal oxide semiconductor
- image sensor
- analog to digital converter
- design considerations
- solid state
- low cost
- infrared
- analog vlsi
- magnetic tape
- power supply
- cmos image sensor
- vlsi circuits
- delay insensitive
- computer simulation
- charge coupled device
- low voltage
- fading channels