A 10-bit 50 MS/s SAR ADC in 65 nm CMOS with on-chip reference voltage buffer.
Prakash HarikumarJ. Jacob WiknerPublished in: Integr. (2015)
Keyphrases
- analog to digital converter
- low voltage
- cmos technology
- random access memory
- nm technology
- wide dynamic range
- dynamic range
- low power
- mixed signal
- cmos image sensor
- power consumption
- image sensor
- clock gating
- metal oxide
- solid state
- single chip
- power dissipation
- metal oxide semiconductor
- high speed
- low cost
- power supply
- silicon on insulator
- analog vlsi
- sar images
- synthetic aperture radar
- video camera
- memory access
- virtual memory
- design considerations
- parallel processing
- image reconstruction
- power system
- circuit design
- low power consumption
- parameter estimation