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Self-checking logic design for FPGA implementation.

Parag K. LalaAlfred L. Burress
Published in: IEEE Trans. Instrum. Meas. (2003)
Keyphrases
  • fpga implementation
  • hardware implementation
  • user interface
  • neural network
  • multiscale
  • pattern recognition
  • low cost
  • design process
  • parallel processing
  • modal logic
  • chip design