A peripheral circuit reuse structure integrated with a retimed data flow for low power RRAM crossbar-based CNN.
Keni QiuWeiwen ChenYuanchao XuLixue XiaYu WangZili ShaoPublished in: DATE (2018)
Keyphrases
- low power
- data flow
- high speed
- digital signal processing
- power consumption
- logic circuits
- low cost
- vlsi circuits
- cmos technology
- power reduction
- gate array
- delay insensitive
- power dissipation
- database machine
- digital circuits
- single chip
- control flow
- wireless transmission
- high power
- low power consumption
- vlsi architecture
- image sensor
- mixed signal
- software engineering
- nm technology
- real time