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Annealing Processing Architecture of 28-nm CMOS Chip for Ising Model With 512 Fully Connected Spins.
Ryoma Iimura
Satoshi Kitamura
Takayuki Kawahara
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2021)
Keyphrases
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fully connected
high speed
low cost
prior knowledge
pairwise
probabilistic model
conditional random fields
neural nets