A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths - Toward Efficient CBC-Mode Implementation.
Rei UenoSumio MoriokaNaofumi HommaTakafumi AokiPublished in: IACR Cryptol. ePrint Arch. (2016)
Keyphrases
- high throughput
- hardware architecture
- microarray
- hardware implementation
- genome wide
- biological data
- hardware architectures
- low latency
- systems biology
- efficient implementation
- genomic data
- proteomic data
- protein protein interactions
- mass spectrometry
- data acquisition
- mass spectrometry data
- field programmable gate array
- dna sequencing
- machine learning
- associative memory
- gene expression
- object oriented