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A reduced-area low-power low-voltage single-ended differential pair.
Jan Mulder
Marcel van de Gevel
Arthur H. M. van Roermund
Published in:
IEEE J. Solid State Circuits (1997)
Keyphrases
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low power
cmos technology
low voltage
power consumption
high speed
low cost
mixed signal
power management
vlsi circuits
single chip
power line
low power consumption
image sensor
logic circuits
computer vision
design considerations
power reduction
hardware and software
parallel processing