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A 0.5 V 10-bit 3 MS/s SAR ADC With Adaptive-Reset Switching Scheme and Near-Threshold Voltage-Optimized Design Technique.

Jaegeun SongJaehun JunChulwoo Kim
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2020)
Keyphrases
  • adaptive threshold
  • analog to digital converter
  • case study
  • high speed