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A Systematic Technique for Verifying Critical Path Delays in a 300MHz Alpha CPU Design Using Circuit Simulation.
Madhav P. Desai
Yao-Tsung Yen
Published in:
DAC (1996)
Keyphrases
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critical path
high speed
circuit design
design process
job shop scheduling problem
search space
scheduling problem
computational intelligence
optimization problems
optimization algorithm
chip design