Login / Signup
12.3 A 48GHz BW 225mW/ch Linear Driver IC with Stacked Current-Reuse Architecture in 65nm CMOS for Beyond-400Gb/s Coherent Optical Transmitters.
Teruo Jyo
Munehiko Nagatani
Josuke Ozaki
Mitsuteru Ishikawa
Hideyuki Nosaka
Published in:
ISSCC (2020)
Keyphrases
</>
power consumption
high speed
nm technology
cmos technology
low power
power supply
real time
low voltage
hd video
low cost
analog vlsi
packet switching
management system
learning objects
software architecture
focal plane