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Multi-stage dual replica bit-line delay technique for process-variation-robust timing of low voltage SRAM sense amplifier.
Shoubiao Tan
Wenjuan Lu
Chunyu Peng
Zhengping Li
Youwu Tao
Junning Chen
Published in:
Frontiers Inf. Technol. Electron. Eng. (2015)
Keyphrases
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multistage
low voltage
random access memory
production line
production system
lot sizing
single stage
dynamic programming
multi view
video sequences
stochastic optimization
stochastic programming