10.6 continuous-time linear equalization with programmable active-peaking transistor arrays in a 14nm FinFET 2mW/Gb/s 16Gb/s 2-Tap speculative DFE receiver.
Pier Andrea FranceseThomas ToiflMatthias BraendliChristian MenolfiMarcel A. KosselThomas MorfLukas KullToke Meyer AndersenHazar YuekselAlessandro CevreroDanny LuuPublished in: ISSCC (2015)