Design and Implementation of Efficient Vedic Multiplier Using Reversible Logic.
Saravanan ParamasivamP. ChandrasekarLivya ChandranNikilla SriramP. KalpanaPublished in: VDAT (2012)
Keyphrases
- efficient implementation
- case study
- highly optimized
- micron cmos
- chip design
- implementation issues
- design space
- design methodologies
- design considerations
- database
- computer aided
- cost effective
- design process
- artificial intelligence
- complexity analysis
- computer architecture
- current status
- building blocks
- rapid prototyping
- circuit design
- digital signal processing
- computationally efficient
- state space
- database systems
- high level synthesis